//: version "1.6d"

module main;    //: root_module
wire [31:0] b;    //: /sn:0 {0}(376,294)(376,329)(339,329)(339,339){1}
wire co;    //: /sn:0 /dp:1 {0}(299,353)(289,353){1}
wire ci;    //: /sn:0 /dp:1 {0}(347,353)(405,353)(405,378)(395,378){1}
wire [31:0] s;    //: /sn:0 /dp:1 {0}(323,368)(323,378){1}
wire [31:0] a;    //: /sn:0 {0}(256,291)(256,329)(307,329)(307,339){1}
//: enddecls

  //: switch g3 (ci) @(378,378) /sn:0 /w:[ 1 ] /st:0
  //: dip g2 (b) @(376,284) /sn:0 /w:[ 0 ] /st:0
  //: dip g1 (a) @(256,281) /sn:0 /w:[ 0 ] /st:0
  add g0 (.A(a), .B(b), .S(s), .CI(ci), .CO(co));   //: @(323,355) /sn:0 /w:[ 1 1 0 0 0 ]

endmodule